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[755-1] Reset on dynamic-CMOS DFF
Folks,
A couple of people asked how can they include an asynchronous
Reset in the dynamic CMOS flip-flops that are shown in the book
(figures 5.58, 5.59 and elsewhere). This is actually the tricky
part of the homework that you are supposed to figure out
yourself :)
Keep in mind though that whenever Reset goes low, you have to
immediately force the output to zero independently of the clock
(which means something about the second stage of transistors in
the circuit of 5.58e, for example), and also that you have to set
the state of the first stage of transistors in that circuit to one.
If you don't do this latter part, the Reset will not really work
as expected.
I hope that this helps.
C.
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