TR_1235.ps.gz	"Hierarchical Extensions to SCI"
	
		Proposes and describes the GLOW protocol, designed to
		facilitate efficient large-scale sharing in large
		(hundreds or thousands of nodes) shared-memory 
		multiprocessors.

TR_1261.ps.gz	"The Declining Effectiveness of Dynamic
		Cacheing for General-Purpose Microprocessors"

		Measures the efficiency of caches, discusses long-term
		bandwidth limitations to microprocessors.  This report
		is more of an explanation of our project (Galileo) viewpoint 
		than a systematic quantitative study.

TR_1265.ps.gz	"Simulation of the SCI Transport Layer on the 
		Wisconsin Wind Tunnel"

		Describes simulation issues and implementation of an SCI
		transport layer simulator on the Wisconsin Wind Tunnel,
		and provides some demonstrative results.

		Also appears in the proceedings of the 2nd International
		Workshop on SCI-based High-Performance Low-Cost
		Computing

TR_1266.ps.gz	"An Analysis of the Interactions of Overhead-Reducing
		Techniques for Shared-Memory Multiprocessors"

		Evaluates a range of techniques for reducing synch. and
		communication overheads in an SCI-based system.  These
		include better synch. primitives (MCS and QOLB), relaxed
		memory ordering (seq. and release consistency), and 
		data-sharing patterns (pairwise sharing).

		A version of this paper appears as the "best architecture
		paper" in the proceedings of the 1995 ACM International 
		Conference on Supercomputing. 

TR_1295.ps.gz	"Quantifying Memory Bandwidth Limitations for Future
		Microprocessors"

		Provides a thorough discussion as to why future high-performance
		processors are likely to be designed around memory bandwidth
		issues, not memory latency, and not raw processing power.

		A version of this paper appears in the proceedings of
		the 1996 International Symposium on Computer Architecture.